If enabled, the permission control module watches all the memory
access and fires the panic handler if a permission violation is
detected.
This feature automatically splits the SRAM memory into data and
instruction segments and sets Read/Execute permissions for the
instruction part (below given splitting address) and Read/Write
permissions for the data part (above the splitting address).
The memory protection is effective on all access through the IRAM0
and DRAM0 buses.
$ idf.py build
/home/nop/rtos/trace-heap/main/main.c:24:107: error:
'MALLOC_CAP_EXEC' undeclared (first use in this function);
did you mean 'MALLOC_CAP_8BIT'?